axle OS
x86_32 UNIX-like hobby OS
src
kernel
drivers
e1000
driver.h
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#ifndef E1000_DRIVER_H
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#define E1000_DRIVER_H
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#define INTEL_VEND 0x8086 //Intel PCI vendor ID
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#define E1000_DEV 0x100E //e1000 PCI device ID
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#define E1000_I217 0x153A //Intel I217 device ID
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#define E1000_82577LM 0x10EA //Intel 82577LM device ID
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#define REG_CTRL 0x0000
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#define REG_STATUS 0x0008
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#define REG_EEPROM 0x0014
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#define REG_CTRL_EXT 0x0018
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#define REG_IMASK 0x00D0
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#define REG_RCTRL 0x0100
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#define REG_RXDESCLO 0x2800
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#define REG_RXDESCHI 0x2804
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#define REG_RXDESCLEN 0x2808
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#define REG_RXDESCHEAD 0x2810
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#define REG_RXDESCTAIL 0x2818
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#define REG_TCTRL 0x0400
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#define REG_TXDESCLO 0x3800
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#define REG_TXDESCHI 0x3804
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#define REG_TXDESCLEN 0x3808
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#define REG_TXDESCHEAD 0x3810
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#define REG_TXDESCTAIL 0x3818
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#define REG_RDTR 0x2820 // RX Delay Timer Register
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#define REG_RXDCTL 0x3828 // RX Descriptor Control
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#define REG_RADV 0x282C // RX Int. Absolute Delay Timer
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#define REG_RSRPD 0x2C00 // RX Small Packet Detect Interrupt
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#define REG_TIPG 0x0410 // Transmit Inter Packet Gap
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#define ECTRL_SLU 0x40 //set link up
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#define RCTL_EN (1 << 1) // Receiver Enable
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#define RCTL_SBP (1 << 2) // Store Bad Packets
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#define RCTL_UPE (1 << 3) // Unicast Promiscuous Enabled
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#define RCTL_MPE (1 << 4) // Multicast Promiscuous Enabled
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#define RCTL_LPE (1 << 5) // Long Packet Reception Enable
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#define RCTL_LBM_NONE (0 << 6) // No Loopback
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#define RCTL_LBM_PHY (3 << 6) // PHY or external SerDesc loopback
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#define RTCL_RDMTS_HALF (0 << 8) // Free Buffer Threshold is 1/2 of RDLEN
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#define RTCL_RDMTS_QUARTER (1 << 8) // Free Buffer Threshold is 1/4 of RDLEN
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#define RTCL_RDMTS_EIGHTH (2 << 8) // Free Buffer Threshold is 1/8 of RDLEN
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#define RCTL_MO_36 (0 << 12) // Multicast Offset - bits 47:36
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#define RCTL_MO_35 (1 << 12) // Multicast Offset - bits 46:35
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#define RCTL_MO_34 (2 << 12) // Multicast Offset - bits 45:34
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#define RCTL_MO_32 (3 << 12) // Multicast Offset - bits 43:32
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#define RCTL_BAM (1 << 15) // Broadcast Accept Mode
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#define RCTL_VFE (1 << 18) // VLAN Filter Enable
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#define RCTL_CFIEN (1 << 19) // Canonical Form Indicator Enable
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#define RCTL_CFI (1 << 20) // Canonical Form Indicator Bit Value
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#define RCTL_DPF (1 << 22) // Discard Pause Frames
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#define RCTL_PMCF (1 << 23) // Pass MAC Control Frames
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#define RCTL_SECRC (1 << 26) // Strip Ethernet CRC
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// Buffer Sizes
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#define RCTL_BSIZE_256 (3 << 16)
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#define RCTL_BSIZE_512 (2 << 16)
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#define RCTL_BSIZE_1024 (1 << 16)
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#define RCTL_BSIZE_2048 (0 << 16)
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#define RCTL_BSIZE_4096 ((3 << 16) | (1 << 25))
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#define RCTL_BSIZE_8192 ((2 << 16) | (1 << 25))
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#define RCTL_BSIZE_16384 ((1 << 16) | (1 << 25))
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// Transmit Command
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#define CMD_EOP (1 << 0) // End of Packet
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#define CMD_IFCS (1 << 1) // Insert FCS
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#define CMD_IC (1 << 2) // Insert Checksum
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#define CMD_RS (1 << 3) // Report Status
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#define CMD_RPS (1 << 4) // Report Packet Sent
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#define CMD_VLE (1 << 6) // VLAN Packet Enable
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#define CMD_IDE (1 << 7) // Interrupt Delay Enable
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// TCTL Register
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#define TCTL_EN (1 << 1) // Transmit Enable
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#define TCTL_PSP (1 << 3) // Pad Short Packets
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#define TCTL_CT_SHIFT 4 // Collision Threshold
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#define TCTL_COLD_SHIFT 12 // Collision Distance
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#define TCTL_SWXOFF (1 << 22) // Software XOFF Transmission
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#define TCTL_RTLC (1 << 24) // Re-transmit on Late Collision
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#define TSTA_DD (1 << 0) // Descriptor Done
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#define TSTA_EC (1 << 1) // Excess Collisions
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#define TSTA_LC (1 << 2) // Late Collision
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#define LSTA_TU (1 << 3) // Transmit Underrun
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#endif
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